- Execute electrical, functional, and system tests of DDR4 memory sub-system test plans as part of a post-silicon Power-System Memory Engineering team.
- Verify system functionality to product specification using hardware and software
- validation tools, oscilloscopes, and logic analyzers.
- Develop technical test plans to support system level bring-up and the validation execution of DDR4 memory subsystem.
- Analyze & debug electrical and functional test data to drive into production risk-call decisions.
- Supports lab functions including rework, inventory, & system test of memory devices.
- Demonstrated technical expertise in the development and execution of system level memory interface electrical and functional test plans.
- Knowledge of modern Server uArch (Power, Z, x86, ARM) and system technologies (DDR or other High-Speed IOs such as PCIe, SATA, USB)
- Demonstrated experience with or knowledge using oscilloscopes, reading schematics and layout design files to characterize high-speed IOs
- Debugging skills at SoC and System level
- Knowledge of modern OS kernel (Linux, AIX) and programming / scripting language
- (C/C++, Python, Perl, …) would be a plus
- Must be a self-starting team player with excellent communication skills who can work with minimal guidance
- Good written and oral communication skills, with the ability to communicate with a variety of engineering disciplines and management.
- Passion and hunger to learn new technology every day and drive to getting things done
- Associate Degree / BS-EE / BS-CE / Masters plus at least 2 years of directly related experience will be considered a plus.